教育背景
1996-2000:北京理工大学 本科
2000-2005:中国科学院微电子研究所 博士研究生
工作简历
2005-2010, 中国科学院计算技术研究所,处理器体系结构室,高级工程师
2010-2017:中国科学院微电子研究所,微电子器件与集成技术重点实验室,副研究员
2017-至今,中国科学院微电子研究所,微电子器件与集成技术重点实验室,研究员
集成电路芯片设计方向:
1)智能芯片处理与集成
2)高速接口电路设计
3)存储器芯片电路设计1)国家重点研发计划 “高密度阻变存储器材料及器件集成技术研究” 项目负责人 + 课题负责人
2)863课题“阻变存储器外围电路设计关键技术研究” 课题负责人
3)自然科学面上基金“面向高带宽应用的高速串行接口电路关键技术研究”课题负责人
4)自然科学青年基金“片间高速收发电路的低功耗技术研究”课题负责人个人出版专著:
《低功耗集成电路》、《集成电路验证》
发表论文六十余篇,其中近期论文:
[1] Q. Huo, Feng zhang* et al. Demonstration of 3D Convolution Kernel Function Based on 8-layer 3D Vertical Resistive Random Access Memory. IEEE Electron Device Letters, 2020.
[2] Q. Huo, Feng zhang* et al. Physics-Based Device-Circuit Cooptimization Scheme for 7-nm Technology Node SRAM Design and Beyond. IEEE Transactions on Electron Device, 2020.
[3] Q. Huo, Feng Zhang* et al. A Novel General Compact Model Approach for 7-nm Technology Node Circuit Optimization from Device Perspective and Beyond. IEEE Journal of the Electron Devices Society.2020
[4] Lei dengyun, Feng Zhang* et al. Effect of Moisture Stress on the Resistance of HfO2/TaOx-based 8-Layer 3D Vertical Resistive Random Access Memory.IEEE Electron Device Letters, 2019.
[5] Yiming Wang, Feng Zhang* et al. A Few-Step and Low-Cost Memristor Logic Based on MIG Logic for Frequent-Off Instant-On Circuits in IoT Applications.IEEE Transactions on circuits and systems II.2019.
[6]Ying Zhao, Feng Zhang*, et al .A Compact Model for Drift and Diffusion Memristor Applied in Neuron Circuits Design . IEEE Transactions on Electron Device, 2018.
[7]Feng Zhang, Fan Dongyu, Duan Yuan,MengFan Chang,Ming Liu. A 130nm 1Mb HfOx Embedded RRAM Macro Using Self-Adaptive Peripheral Circuit System Techniques for 1.6X Work Temperature Range. 2017 IEEE Asian solid-state conference.
[8]Xiaowei Han, Hongbin sun, Huangqiang Wu, Feng Zhang, Ming Liu et al.A 0.13um 64Mb HfOx Reram using configurable ramped voltage write and low read-disturb sensing techniques for reliability improvement. 2017 IEEE custom integrated circuits conference.
[9]Nan QI, Patrick Yin Chiang, Feng Zhang*,Ming Liu. A 51Gb/s, 320mW, PAM4 CDR with Baud-Rate Sampling for High-Speed Optical Interconnects.2017 IEEE Asian solid-state conference.
目前已经申请国内发明专利三十余项
人才队伍