| 论文编号: | 172511O120100256 |
| 第一作者所在部门: | 二室四组 |
| 论文题目: | 基于SOI工艺SRAM基FPGA的上电电流最小化设计 |
| 论文题目英文: | |
| 作者: | 王剑 |
| 论文出处: | EI收录 |
| 刊物名称: | ICSICT2010 |
| 年: | 2010 |
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| 影响因子: | 0 |
| 摘要: | A large and sudden current called surge current is always induced due to the momentary supply current through a low resistance path to ground when filed programmable gate array (FPGA) power on.According to the cause of power-on surge current, we modify the power-on sequence of FPGA, propose a novel SRAM cell embedded in the FPGA and add power routing pool to the FPGA.The experimental results indicate the surge current of FPGA has been significantly reduced. |
| 英文摘要: | |
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| 备注: | ICSICT2010 |
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