| 论文编号: | 172511O120120058 |
| 第一作者所在部门: | 十室一组 |
| 论文题目: | 金属栅回刻平坦化技术 |
| 论文题目英文: | |
| 作者: | 孟令款 |
| 论文出处: | |
| 刊物名称: | Journal of Semiconductors |
| 年: | 2012 |
| 卷: | |
| 期: | 3 |
| 页: | 36001－1 |
| 联系作者: | 孟令款 |
| 收录类别: | |
| 影响因子: | 3.844 |
| 摘要: | Planarization used in a gate-last CMOS device was successfully developed by particular technologies of SOG two-step plasma etch-back plus one special etch-back step for SOG/SiO2 interface trimming. The within-the wafer ILD thickness non-uniformity can reach 4.19% with a wafer edge exclusion of 5 mm. SEM results indicated that there was little “dish effect” on the 0.4 m gate-stack structure and finally achieved a good planarization profile on the whole substrate. The technology provided a CMP-less process basis for sub-100 nm high-k/metal gate-last CMOS integration. |
| 英文摘要: | |
| 外单位作者单位: | |
| 备注: | EI收录 |
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