[1] Minghui Yin, Haitao Xu*, Zhiqiang Li*, et al. Wafer-scale carbon-based CMOS PDK compatible withsilicon-based VLSI design flow，Nano Research, 2024, 17(8): 7557-7566.

[2] Minghui Yin*, Zhiqiang Li*, et al. Power, performance, and area evaluation across 180nm-28nm technology nodes based on benchmark circuits, IEICE, Vol.21, No.9, 1-6, 2024.

[3] Yiying Liu, Minghui Yin*, Zhiqiang Li*, et al. Virtual_N2_PDK: A Predictive Process Design Kit for 2-nm Nanosheet FET Technology, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2025.

[4] Minghui Yin, Lingli Zhao and Shouguo Wang, Atmospheric Pressure Plasma Enhanced Chemical Vapor Deposition of Borophosphosilicate Glass Films, Japanese Journal of Applied Physics (JJAP), Vol.47, No.3, 2008, pp.1735–1739.

[5] Zhao Bo, Minghui Yin*, Design of a variable precision CORDIC coprocessor for RISC-V architecture based on FinFET process, IEICE Vol.20, No.19, 1-5, 2023.

[6] Zihao Yang, Minghui Yin*, Design of a high performance CNFET 10T SRAM cell at 5nm technology node, IEICE Vol.20, No.12, 1-6, 2023.

[7] Lingli Zhao , Xiaojin Duan , Minghui Yin*, et al. Etching Si Wafer Using Atmospheric Pressure RF Cold Plasma Jet[J]. Chinese Journal of Semiconductors, 2007.

[8] Zhaoqing Wang, Minghui Yin, et al. Analysis and characterization of layout dependent effect for advance FinFET circuit design, Microelectronics Journal, 125 (2022) 105449.

[9] Yajie Zou, Hongwei Liu, Yiying Liu,Minghui Yin, et al. A Compact Model for Carbon Nanotube Field Effect Transistors Incorporating Temperature Effects and Application for Operational Amplifier Design[J]. ECS JSS, 2024, 13(4): 041001.

[10] Jianglin Luo, Zhengyong Zhu, Minghui Yin, Chao Zhao, et al. Dual-gate 2T0C Gain Cell for Multi-bit Input Vector-matrix Multiplication In-Memory Computing，IEEE CSTIC 2025, march 24-25.